Static information storage and retrieval – Read/write circuit – Sipo/piso
Reexamination Certificate
2005-04-12
2005-04-12
Tran, Andrew Q. (Department: 2824)
Static information storage and retrieval
Read/write circuit
Sipo/piso
C365S230030, C365S233100, C365S189020, C365S189120, C365S220000, C365S230060
Reexamination Certificate
active
06879535
ABSTRACT:
A nonvolatile memory device, in a continuous read operation, requires no dummy bytes between receipt of a read command and commencement of a scanning out of a first target data byte. The highest order bits of a range of possible target data bytes are speculatively read while only a partial set of the highest order address bits are received. The proper set of highest order target data bits is available and scanned out at a time a complete target data address is received. During this scan out time, the remainder of the target data byte is read and prepared for scanning out starting at the next highest order bit. In this way, the data byte targeted by a read command is available immediately and continuously after receipt of the full read command and address.
REFERENCES:
patent: 4742474 (1988-05-01), Knierim
patent: 4775859 (1988-10-01), Starkey et al.
Atmel Corporation
Schneck Thomas
Schneck & Schneck
Tran Andrew Q.
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