Apparatus providing locally adaptive retiming pipeline with...

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses

Reexamination Certificate

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Details

C713S600000, C326S093000, C327S141000, C375S354000, C708S631000, C712S219000

Reexamination Certificate

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07917793

ABSTRACT:
The present invention uses a swing structure to avoid using a clock period at a non-efficient execution time. The execution time is precisely controlled to enhance a performance of a processor using a low voltage. Thus, synchronization problems in a chip under different environments are solved for high reliability.

REFERENCES:
patent: 6167529 (2000-12-01), Dalvi
patent: 6958627 (2005-10-01), Singh et al.
patent: 7278080 (2007-10-01), Flautner et al.
patent: 7406588 (2008-07-01), Lin et al.
patent: 7409027 (2008-08-01), Sudjian

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