Apparatus, method, and signal-bearing medium embodying a...

Details Apparatus, method, and signal-bearing medium embodying a... Apparatus, method, and signal-bearing medium embodying a...

2008-05-13

2008-05-13

Kerveros, James C. (Department: 2117)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

Reexamination Certificate

active

11206990

ABSTRACT:
A method and a signal-bearing medium embodying a program for a logic circuit design verification apparatus which includes a dynamic verification device that verifies a logic circuit executing a logic simulation, a static verification device that verifies the logic circuit executing a property verification, and a determination device that determines whether a test coverage includes an unverified part not verified by any of the dynamic verification device and the static verification device.

REFERENCES:
patent: 7093216 (2006-08-01), Nozuyama
patent: 7143376 (2006-11-01), Eccles

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