Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Patent
1996-05-23
1998-07-28
Lee, Thomas C.
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
711164, G06F 1200
Patent
active
057873097
ABSTRACT:
Main storage access protection against unwanted I/O accesses in storage blocks/page frames independent of any protection provided against unwanted CPU accesses. I/O programs are each assigned an I/O program key which is matched against an I/O storage key selected from an I/O storage protection array used only for protecting blocks from accesses by I/O programs, but not from any accesses by CPU programs. The address of each storage access request by an I/O program selects a key entry in the array containing the I/O storage key used in the comparison with the I/O program key. Each entry in the I/O storage array may also contain a second I/O storage key which may be either a one-bit type as described and claimed in application Ser. No. 08/652,197 or a two-bit type as described and claimed in application Ser. No. 08/652,079, both applications of which were filed on the same day as this application and assigned to the same assignee. CPU storage protection array is not required for I/O storage protection, but CPU storage protection may be added for protecting storage blocks against unwanted accesses by CPU programs. Either real or virtual CPU storage key protection may be added as compatible with the subject I/O storage protection arrangement. The separate I/O and CPU access protection functions may each include any or all of: write protection, read protection, and storage key protection for page frames.
REFERENCES:
patent: 3576544 (1971-04-01), Cordero, Jr. et al.
patent: 4293910 (1981-10-01), Flusche et al.
patent: 4366537 (1982-12-01), Heller et al.
patent: 4441152 (1984-04-01), Matsuura et al.
patent: 4580217 (1986-04-01), Celio
patent: 4589064 (1986-05-01), Chiba et al.
patent: 4604688 (1986-08-01), Tone
patent: 4954982 (1990-09-01), Tateishi et al.
patent: 4999770 (1991-03-01), Ara et al.
patent: 5163096 (1992-11-01), Clark et al.
patent: 5193175 (1993-03-01), Cutts, Jr. et al.
patent: 5237668 (1993-08-01), Blandy et al.
patent: 5335334 (1994-08-01), Takahashi et al.
patent: 5590309 (1996-12-01), Chencinski et al.
patent: 5619671 (1997-04-01), Bryant et al.
Capowski, R.S. et al., "Dynamic Address Translator for I/O Channels", IBM Technical Disclosure Bulletin, vol. 23, No. 12, May 1981, pp. 5503-5508.
Greenstein Paul Gregory
Guyette Richard Roland
Rodell John Ted
International Business Machines - Corporation
Kinnaman, Jr. W. A.
Lee Thomas C.
Ton David
LandOfFree
Apparatus for protecting storage blocks from being accessed by u does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Apparatus for protecting storage blocks from being accessed by u, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Apparatus for protecting storage blocks from being accessed by u will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-33741