Error detection/correction and fault detection/recovery – Pulse or data error handling – Error count or rate
Patent
1997-10-06
1999-11-16
Tu, Trinh L.
Error detection/correction and fault detection/recovery
Pulse or data error handling
Error count or rate
714795, 714792, G06F 1100
Patent
active
059876310
ABSTRACT:
An apparatus for accurately measuring a bit error ratio by using a viterbi decoder to improve the performance of a communication system that uses cyclic redundancy codes and trellis codes to detect and correct errors. The apparatus generates new cyclic redundancy codes and substitutes them in place of the transmitted cyclic redundancy codes by using decoded data that has been processed by a viterbi decoder. The apparatus then regenerates trellis encoded data by using reconstructed data that contains the new cyclic redundancy codes. Finally, the re-encoded data are compared with the transmitted data to calculate a bit error ratio. The apparatus consists of a viterbi decoding unit, a cyclic redundancy code regeneration unit, a cyclic redundancy code selecting unit, a cyclic redundancy code generating unit, a trellis re-encoding unit, a time delaying unit, a data comparing unit and a bit error ratio measuring unit.
REFERENCES:
patent: 5581577 (1996-12-01), Abe
patent: 5666370 (1997-09-01), Ganesan et al.
patent: 5796757 (1998-08-01), Czaja
Samsung Electronics Co,. Ltd.
Tu Trinh L.
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