Apparatus for manufacturing semiconductor device method for...

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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C438S669000, C438S694000

Reexamination Certificate

active

06271134

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to manufacturing microelectronics, and more particularly, to an apparatus for manufacturing a semiconductor device, a method for forming a polysilicon layer having hemispherical grains (HSG-polysilicon layer), and a method for forming a capacitor having the HSG-polysilicon layer as an electrode.
2. Description of the Related Art
To manufacture a highly reliable semiconductor device, it is important to set appropriate processing conditions. In particular, when the capacitance of a capacitor is increased by forming a hemispherical grain polysilicon (HSG-polysilicon) layer as a lower electrode to increase the surface area of the lower electrode, it is imperative to grow the HSG grains uniformly on an amorphous polysilicon layer.
To uniformly form HSG grains, a crystal growing process in which amorphous silicon accretes onto crystal silicon nuclei to form crystalline grains should be stable, e.g., temperature conditions in the process chamber should be steady. Also, the speed of silicon migration for forming the grains must be higher than the speed of amorphous silicon crystallization. Thus, to stabilize the crystal growing step and appropriately adjust the crystallizing speed, the amount of a source gas, the reaction time and temperature profile in the reaction chamber must be precisely controlled.
Unfortunately, the conventional technology for forming the HSG-polysilicon layer has not yet defined the optimal combination of the temperature profile in the reaction chamber, the flow rate of a silicon source gas, and the reaction (i.e., process) duration. One result is that the crystal growth step is easily disturbed by unsteady temperatures and non-optimal gas flow. Further, since the amorphous silicon crystallizing speed and the grain growing speed are not appropriately controlled, bald defects can be generated, in which HSG grains can grow abnormally as evidenced by higher reflectivity to light, and undesirable extraneous HSG grains may be formed on an insulating film beyond the region designed to form the lower electrode of a capacitor.
One problem leading to non-uniform HSG grains is caused by changes to the temperature profile in the processing chamber due to changes in the position of a wafer supporter. As the process proceeds, the wafer supporter moves from a position where loading and unloading occur and cooler ambient air is introduced into the chamber (a load/unload position), to a position where the crystal growing process occurs (a process position) and vice versa. In the HSG formation process, for example, the difference between temperatures at the load/unload position and the process position is over 70° C. Therefore, when the loaded wafer and wafer supporter move from the load/unload position to the process position to form the HSG-polysilicon layer, the wafer, and wafer supporter, and chamber temperatures continue to increase slowly with time until the temperature difference is minimized. When subjected to such a constantly varying temperature, the HSG-polysilicon layer forming process becomes non-uniform.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide an apparatus and method for manufacturing a semiconductor device suitable for forming an HSG-polysilicon layer with increased stability during the process and fewer defects in the resulting layer.
It is still another object of the present invention to provide an optimal method for forming a capacitor with desired characteristics using the HSG-polysilicon layer as an electrode.
The semiconductor device manufacturing apparatus has a wafer supporter for holding a wafer during a semiconductor manufacturing process. An elevator moves the wafer supporter vertically among a load/unload position, a standby position above the load/unload position, and a process position above the load/unload position.
In another aspect of the invention, a method for manufacturing a semiconductor device includes maintaining a wafer supporter at a standby position in a processing chamber to equilibrate a temperature of the wafer supporter with a predetermined standby temperature of the processing chamber. Then the wafer supporter is lowered to a wafer load/unload position and a wafer is loaded onto the wafer supporter. Then the wafer supporter with the wafer loaded thereon is elevated to a process position where a process for manufacturing a semiconductor device is performed. The wafer supporter is lowered to the wafer load/unload position after the manufacturing process is completed, and the wafer is unloaded from the wafer supporter. Finally, the wafer supporter is a elevated to the standby position again.
In another aspect of the present invention, the process for manufacturing a semiconductor device includes supplying a silicon source gas at a flow rate within a flow rate range from about 7 standard cubic centimeters per minute (sccm) to about 23 sccm for a supply duration within a supply duration range from about 50 seconds to about 150 seconds to provide crystal silicon nuclei to an amorphous silicon layer disposed on a semiconductor substrate. Then the amorphous silicon layer with the crystal silicon nuclei is annealed for an anneal duration within an anneal duration range from about 100 seconds to about 400 seconds to convert the amorphous silicon layer into a hemispherical grain polysilicon (HSG-polysilicon) layer.
By using the semiconductor device manufacturing apparatus according to the present invention, the temperature profile of the chamber can be easily stabilized, thereby achieving more uniform processing with time. Also, by forming an HSG-polysilicon layer using processing variables set according to the present invention, an HSG polysilicon layer suitable for the lower electrode of a capacitor can be formed without bald defects.


REFERENCES:
patent: 4962726 (1990-10-01), Matsushita et al.
patent: 5378283 (1995-01-01), Ushikawa
patent: 5387265 (1995-02-01), Kakizaki et al.
patent: 5462397 (1995-10-01), Iwabuchi
patent: 5863602 (1999-01-01), Watanabe et al.
patent: 5873942 (1999-02-01), Park et al.
patent: 6039811 (2000-03-01), Park et al.

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