Apparatus for improved SRAM device performance through...

Details Apparatus for improved SRAM device performance through... Apparatus for improved SRAM device performance through...

2008-06-26

2010-06-01

Nguyen, Tan T. (Department: 2827)

Static information storage and retrieval

Systems using particular element

Flip-flop

C365S156000, C365S190000

Reexamination Certificate

active

07729159

ABSTRACT:
A static random access memory (SRAM) device a pair of cross-coupled, complementary metal oxide semiconductor (CMOS) inverters configured as a storage cell for a bit of data, a first pair of transfer gates configured to couple complementary internal nodes of the storage cell to a corresponding pair of bitlines during a read operation of the device; and a second pair of transfer gates configured to couple the storage cell nodes to the pair of bitlines during a write operation of the device, wherein impedance between the bitlines and the storage cell nodes during the write operation is less than that for the read operation, wherein impedance between the bitlines and the storage cell nodes during the write operation is less than that for the read operation.

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