Apparatus for implementing dynamic data path with...

Details Apparatus for implementing dynamic data path with... Apparatus for implementing dynamic data path with...

2007-12-11

2007-12-11

Tan, Vibol (Department: 2819)

Electronic digital logic circuitry

Clocking or synchronizing of logic stages or gates

Field-effect transistor

C326S095000, C326S112000, C326S119000, C365S230050, C365S154000

Reexamination Certificate

active

11278169

ABSTRACT:
A keeper device for dynamic logic includes a first keeper path statically coupled to a dynamic data path, the first keeper path configured to prevent false discharge of the dynamic data path during an evaluation thereof, and a second keeper path selectively coupled to the dynamic data path. The second keeper path is configured to maintain the dynamic data path at a nominal precharge level prior to an evaluation thereof, wherein the second keeper path is decoupled from the dynamic data path during the evaluation.

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