Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses – Using delay
Reexamination Certificate
2005-07-12
2005-07-12
Cottingham, John R. (Department: 2185)
Electrical computers and digital processing systems: support
Synchronization of clock or timing signals, data, or pulses
Using delay
C713S400000, C713S600000, C713S601000, C711S167000
Reexamination Certificate
active
06918047
ABSTRACT:
A reference signal input of a delay locked loop is connected to receive a reference clock. The delay locked loop provides a drive clock that drives a clock distribution tree. One of the endpoints of the clock distribution tree is connected to a feedback reference of the delay locked loop. By using one the endpoints as a feedback loop to the delay locked loop the signal received at components attached to the endpoints of the distribution tree can be synchronized to the reference input received at the delay locked loop.
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Drapkin Oleg
Mizuyabu Carl
Sita Richard K.
ATI International Srl
Cottingham John R.
Toler Larson & Abel, LLP
Trujillo James K.
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