Apparatus for automatically initiating a stress mode of a semico

Details Apparatus for automatically initiating a stress mode of a semico Apparatus for automatically initiating a stress mode of a semico

1992-01-27

1994-11-22

LaRoche, Eugene R.

Static information storage and retrieval

Read/write circuit

Testing

36518907, 327 62, 327 72, G11C 700

Patent

active

053674910

ABSTRACT:
In a highly integrated semiconductor memory device, apparatus for setting a stress mode without applying a stress voltage from the exterior is provided. A triggered time point T.sub.S to a stress mode can be set by greatly raising an internal supply voltage when the external supply voltage is raised to a voltage over the stress voltage.

REFERENCES:
patent: 4910455 (1990-03-01), Nadd
patent: 4999521 (1991-03-01), Rusznyak
patent: 5087834 (1992-02-01), Tsay
patent: 5132560 (1992-07-01), Kane
patent: 5134587 (1992-07-01), Steele

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