Apparatus for aligning input data in semiconductor memory...

Electrical computers and digital processing systems: support – Clock – pulse – or timing signal generation or analysis

Reexamination Certificate

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C365S219000, C365S233100

Reexamination Certificate

active

07975162

ABSTRACT:
An apparatus for aligning input data in a semiconductor device includes at least one alignment block and a decision block. The at least one alignment block is for aligning serial input data into groups of parallel data synchronized to at least one divided data strobe signal for increasing margin between the maximum and minimum tDQSS values. The decision block is for selecting one of the groups of parallel data as valid data in response to synchronization information generated for removing any invalid data in the serial input data resulting from a write gap.

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Japanese Patent Application No. 2003-061751 to La et al., having Publication date of Oct. 31, 2003 (w/ English Abstract page).

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