Semiconductor device manufacturing: process – Including control responsive to sensed condition – Optical characteristic sensed
Reexamination Certificate
2001-12-26
2004-05-18
Nguyen, George (Department: 3723)
Semiconductor device manufacturing: process
Including control responsive to sensed condition
Optical characteristic sensed
Reexamination Certificate
active
06736720
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to chemical mechanical polishing (CMP) systems, and to techniques for improving the performance and effectiveness of CMP operations. More specifically, the present invention relates to apparatus and methods for controlling the temperature of a wafer by directly monitoring the wafer temperature and transferring thermal energy to or from the wafer during CMP operations.
2. Description of the Related Art
In the fabrication of semiconductor devices, there is a need to perform CMP operations, including polishing, buffing and wafer cleaning; and to perform wafer handling operations in conjunction with such CMP operations. For example, a typical semiconductor wafer may be made from silicon and, for example, may be a disk that is 200 mm or 300 mm in diameter. The 200 mm wafer may have a thickness of 0.028 inches, for example. For ease of description, the term “wafer” is used below to describe and include such semiconductor wafers and other planar structures, or substrates, that are used to support electrical or electronic circuits.
Typically, integrated circuit devices are in the form of multi-level structures fabricated on such wafers. At the wafer level, transistor devices having diffusion regions are formed. In subsequent levels, interconnect metallization lines are patterned and electrically connected to the transistor devices to define the desired functional device. Patterned conductive layers are insulated from other conductive layers by dielectric materials. As more metallization levels and associated dielectric layers are formed, the need to planarize the dielectric material increases. Without planarization, fabrication of additional metallization layers becomes substantially more difficult due to the higher variations in the surface topography. In other applications, metallization line patterns are formed in the dielectric material, and then metal CMP operations are performed to remove excess metallization.
In a typical CMP system, a wafer is mounted on a carrier with a surface of the wafer exposed for CMP processing. The carrier and the wafer rotate in a direction of rotation. The CMP process may be achieved, for example, when the exposed surface of the rotating wafer and an exposed surface of a polishing pad are urged toward each other by a force, and when such exposed surfaces move in respective polishing directions. Chemical aspects of the CMP process include reactions between the wafer and the components of slurry which is applied to the polishing pad and to the wafer. Mechanical aspects of the CMP process include the force by which the wafer and the polishing pad are urged toward each other, and the relative orientations of the wafer and the polishing pad.
Although control has been provided for many of the factors on which successful CMP processing depends, a CMP system typically does not directly control the temperature of the wafer. For example, factors such as the angle of the exposed surface of the wafer relative to the exposed surface of the polishing pad may be controlled by gimbals. In other types of CMP systems, linear bearings are provided to avoid having any such angle.
Such control of factors other than wafer temperature only indirectly influences the wafer temperature during CMP operations. For example, temperature-dependent chemical reactions have been indirectly influenced by controlling the force by which the wafer and carrier head are urged toward each other, which may affect frictional heating and indirectly cause temperature changes in the wafer. Attempts have also been made to overcome anticipated problems caused by uneven polishing of the exposed surface of the wafer. Such attempts provide contours on the polishing pad (e.g., a polishing belt). Further, various materials have been provided between the wafer carrier and the wafer to allow fluids to flow from the carrier head to the wafer. For example, in vacuum heads that carry the wafer, a thin film has been provided to distribute the slurry from the head to the wafer. However, although fluids such as slurry have temperature-dependent characteristics, such as viscosity, the typical CMP system does not directly control the temperature of the wafer.
This situation relating to indirect control, or no control, of wafer temperature is complicated by the interrelationship of many of the factors that are controlled, and the combined effect of such factors on CMP operations. Thus, for example, if wafer-to-carrier force is increased in an attempt to increase wafer temperature, many other unintended variables may be influenced, and limit or prohibit the use of such force for the intended temperature control. For example, such force may directly affect the rate of polishing in a manner that conflicts with the need to have a particular wafer temperature.
What is needed then, is a CMP system and methods of directly controlling the temperature of a wafer during CMP operations, which does not rely on indirect factors such as CMP force, for example. Such a CMP system would provide apparatus and methods that directly monitor the temperature of the wafer during the CMP operations, and control one or more sources of thermal energy so that the desired wafer temperature is achieved. Moreover, since the desired CMP operations may require temperature variations across the area of the wafer, such a CMP system would be provided in which apparatus and methods directly monitor the temperature of the various areas of the wafer during the CMP operations, and separately control the sources of thermal energy so that the desired wafer temperature is achieved for each of the wafer areas. Additionally, such a CMP system and methods would configure structure that is in direct contact with the wafer during CMP operations, so that the configuration is consistent with the desired wafer temperature control.
SUMMARY OF THE INVENTION
Broadly speaking, the present invention fills these needs providing CMP systems and methods which implement solutions to the above-described problems. Thus, by the present invention, a CMP system and methods may control local planarization properties on the wafer during the performance of one or more CMP operations on the wafer. The properties may, for example, be the amount of material removed from the wafer. Via a system controller and a thermal controller, operations are performed for controlling the temperature of the wafer so as to achieve desired local planarization properties on the wafer. For such purpose, such system may directly control the temperature of a wafer during CMP operations, without relying on indirect factors such as CMP force, for example. Such a CMP system further provides apparatus and methods that directly monitor the temperature of the wafer during the CMP operations, and control one or more sources of thermal energy so that the desired wafer temperature is achieved. Moreover, to accommodate CMP operations requiring temperature variations across the area of the wafer, such a CMP system may be configured to directly monitor the temperature of the various areas of the wafer during the CMP operations, and separately control the sources of thermal energy so that the desired wafer temperature is achieved for each of the wafer areas. Additionally, such a CMP system and methods may configure structure that is in direct contact with the wafer during CMP operations, such as a wafer support film, so that the configuration (e.g., thermal transfer characteristic) is consistent with the desired wafer temperature control.
In the present invention, one aspect of controlling the temperature of a wafer for chemical mechanical polishing operations provides a wafer carrier having a wafer mounting surface. A thermal energy transfer unit may be adjacent to the wafer mounting surface for transferring energy relative to the wafer. A thermal energy detector may be adjacent to the wafer mounting surface for detecting the temperature of the wafer. A controller is responsive to the detector for controlling the supply
Bright Nicolas
Hemker David J.
Lam Research Corporation
Martine & Penilla LLP
Nguyen George
LandOfFree
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