Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate
2005-02-01
2005-02-01
Beausoliel, Robert (Department: 2113)
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
C714S006130, C714S006130, C714S006130, C714S010000
Reexamination Certificate
active
06851071
ABSTRACT:
An apparatus and method of repairing a processor array for a failure detected at runtime in a system supporting persistent component deallocation are provided. The apparatus and method of the present invention allow redundant array bits to be used for recoverable faults detected in arrays during run time, instead of only at system boot, while still maintaining the dynamic and persistent processor deallocation features of the computing system. With the apparatus and method of the present invention, a failure of a cache array is detected and a determination is made as to whether a repairable failure threshold is exceeded during runtime. If this threshold is exceeded, a determination is made as to whether cache array redundancy may be applied to correct the failure, i.e. a bit error. If so, the cache array redundancy is applied without marking the processor as unavailable. At some time later, the system undergoes a re-initial program load (re-IPL) at which time it is determined whether a second failure of the processor occurs. If a second failure occurs, a determination is made as to whether any status bits are set for arrays other than the cache array that experienced the present failure, if so, the processor is marked unavailable. If not, a determination is made as to whether cache redundancy can be applied to correct the failure. If so, the failure is corrected using the cache redundancy. If not, the processor is marked unavailable.
REFERENCES:
patent: 5535411 (1996-07-01), Speed et al.
patent: 6189117 (2001-02-01), Batchelor et al.
patent: 6615375 (2003-09-01), Mounes-Toussi et al.
patent: 6782492 (2004-08-01), Nakaso
Bossen Douglas Craig
Henderson Daniel James
Hicks Raymond Leslie
Kitamorn Alongkorn
Lewis David Otto
Beausoliel Robert
Maskulinski Michael C
McBurney Mark E.
Walder, Jr. Stephen J.
Yee Duke W.
LandOfFree
Apparatus and method of repairing a processor array for a... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Apparatus and method of repairing a processor array for a..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Apparatus and method of repairing a processor array for a... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3506126