Static information storage and retrieval – Read/write circuit – Data refresh
Patent
1996-11-26
1998-06-09
Nelms, David C.
Static information storage and retrieval
Read/write circuit
Data refresh
365149, G11C 700
Patent
active
057645825
ABSTRACT:
A method and apparatus employing a power-saving technique to refresh data stored in an array of memory cells is disclosed. The refresh apparatus includes a latch circuit, where a reset signal is used to reset the latch circuit, and an input signal is provided change the state of the latch circuit. The refresh system also includes a circuit for generating a select signal electrically connected to the input of the latch circuit. The refresh further includes a pass circuit for passing a decoded signal to generate a selective refresh signal when the latch circuit is set, thereby refreshing one row of the memory cells which contains valid data (i.e., only after a write operation has occurred on the row in question).
REFERENCES:
patent: 4755964 (1988-07-01), Miner
patent: 5347480 (1994-09-01), Urai
patent: 5424980 (1995-06-01), Vinal
patent: 5430680 (1995-07-01), Parris
patent: 5471430 (1995-11-01), Sawada et al.
Nelms David C.
Powerchip Semiconductor Corp.
Tran Michael T.
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