Electrical computers and digital processing systems: memory – Addressing combined with specific memory configuration or... – For multiple memory modules
Reexamination Certificate
2004-06-10
2008-11-18
Nguyen, Hiep T (Department: 2187)
Electrical computers and digital processing systems: memory
Addressing combined with specific memory configuration or...
For multiple memory modules
Reexamination Certificate
active
07454555
ABSTRACT:
An apparatus includes two multi-bank memory devices for storing duplicate data in each memory bank in an embodiment of the invention. The two memory devices are able to replace a more expensive fast-cycle, fixed latency single memory device. In an embodiment of the invention, a memory controller includes controller logic and a plurality of write buffers for interleaving write transactions to each memory bank in the two memory devices. A memory controller also includes tag memory for identifying valid data in the memory banks. In another embodiment of the invention, a game console includes the apparatus and executes game software that requires fixed latency in a mode of operation. In yet another embodiment of the invention, each memory device is coupled to respective write channels. Write data is simultaneously written to two memory banks in respective sets of memory banks in a memory device in an embodiment of the present invention. In an alternate embodiment of the present invention, an apparatus includes four memory devices for storing duplicate data with each memory device having a set of memory banks. The four memory devices are coupled to a controller by four respective write channels.
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Perego Richard E.
Tsern Ely
Ware Frederick A.
Woo Steven
Nguyen Hiep T
Rambus Inc.
Vierra Magen Marcus & DeNiro LLP
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