Apparatus and method for trace stream identification of a...

Details Apparatus and method for trace stream identification of a... Apparatus and method for trace stream identification of a...

2007-12-18

2007-12-18

Wilson, Yolanda L. (Department: 2113)

Error detection/correction and fault detection/recovery

Data processing system error or fault handling

Reliability and availability

C714S030000, C714S034000, C717S124000

Reexamination Certificate

active

10729214

ABSTRACT:
When a DEBUG HALT signal is generated in a target processor during a test procedure, a debug halt sync marker is generated in a program counter trace stream. The debug halt sync marker includes a plurality of packets, the packets identifying that the sync marker is the result of a DEBUG HALT signal. The packets also identify the program counter address at the time of the generation of the DEBUG HALT signal and relate the debug halt sync marker to a timing trace stream.

REFERENCES:
patent: 5771240 (1998-06-01), Tobin et al.
patent: 6463551 (2002-10-01), Kanzaki et al.
patent: 6912675 (2005-06-01), Swoboda
patent: 6961872 (2005-11-01), Yamamoto et al.

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