Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2005-12-27
2005-12-27
Thomas, Tom (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S315000, C257S316000, C257S317000, C257S318000, C438S259000
Reexamination Certificate
active
06979857
ABSTRACT:
A split gate, vertical NROM memory cell is comprised of a plurality of oxide pillars that each has a source/drain region formed in the top of the pillar. A trench is formed between each pair of oxide pillars. A polysilicon control gate is formed in the trench between the pair of oxide pillars. A polysilicon program gate is formed between the control gate and each oxide pillar. The program gates extend along the sidewall of each oxide pillar. A gate insulator layer is formed between each program gate and the adjacent oxide pillar. Each gate insulator layer has a structure for trapping at least one charge. In one embodiment, the gate insulator structure is an oxide-nitride-oxide layer in which the charge is stored at the trench bottom end of the nitride layer. An interpoly insulator is formed between the program gates and the control gate.
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T. Nozaki, T. Tanaka, Y. Kijiya, E. Kinoshita,
Fenty Jesse A.
Leffert Jay & Polglaze P.A.
Micro)n Technology, Inc.
Thomas Tom
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