Apparatus and method for managing mapping information of...

Electrical computers and digital processing systems: memory – Address formation – Address mapping

Reexamination Certificate

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Reexamination Certificate

active

07822940

ABSTRACT:
Provided is an apparatus and method for managing mapping information of a nonvolatile memory, in which a time period required for a request for access to a logic sector of the nonvolatile memory is minimized. The apparatus includes an extractor which extracts a logical sector mapped with each physical sector in physical units mapped with a predetermined logical unit, a mapping information generator which generates mapping information of logical sectors belonging to the logical unit including the extracted logical sector, and a mapping information memory which stores the generated mapping information.

REFERENCES:
patent: 5907856 (1999-05-01), Estakhri et al.
patent: 2002/0041517 (2002-04-01), Kim et al.
patent: 2005/0174849 (2005-08-01), In et al.
patent: 2000-20391 (2000-01-01), None
patent: 2005-222550 (2005-08-01), None
patent: 1999-0075161 (1999-10-01), None
patent: 2004-0072875 (2004-08-01), None

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