Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1998-07-31
2000-06-13
Smith, Matthew
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438391, 257301, H01L 218242
Patent
active
060749091
ABSTRACT:
A method for controlling isolation layer thickness in deep trenches for semiconductor memories in accordance with the present invention includes the steps of providing a deep trench having a storage node formed therein, the storage node having a buried strap, depositing an isolation layer on the buried strap for providing electrical isolation for the storage node, forming a masking layer on the isolation layer to mask a portion of the isolation layer in contact with the buried strap and removing the isolation layer except the portion masked by the mask layer such that control of a thickness of the isolation layer is improved. A method for fabricating vertical transistors by recessing a substrate to permit increased overlap between a transistor channel and buried strap outdiffusion when the transistor is formed is also included. A semiconductor device is also disclosed.
REFERENCES:
patent: 5482883 (1996-01-01), Rajeevakumar
patent: 5831301 (1998-11-01), Horak et al.
Lee Calvin
Paschburg Donald B.
Siemens Aktiengesellschaft
Smith Matthew
LandOfFree
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