Apparatus and method for discrete test access control of...

Details Apparatus and method for discrete test access control of... Apparatus and method for discrete test access control of...

2006-05-25

2009-12-01

Kerveros, James C (Department: 2117)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

Reexamination Certificate

active

07627794

ABSTRACT:
An electronic circuit includes multiple computational cores. A test access protocol machine with a core address register and a signal routing control circuit addresses a selected computational core as specified by the core address register and routes output test data from the selected computational core.

REFERENCES:
patent: 6378093 (2002-04-01), Whetsel
patent: 6686759 (2004-02-01), Swamy
patent: 6918057 (2005-07-01), Brophy et al.
patent: 2004/0006729 (2004-01-01), Pendurkar

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