Electrical computers and digital processing systems: processing – Processing control – Arithmetic operation instruction processing
Reexamination Certificate
2005-03-01
2005-03-01
Chan, Eddie (Department: 2183)
Electrical computers and digital processing systems: processing
Processing control
Arithmetic operation instruction processing
Reexamination Certificate
active
06862678
ABSTRACT:
An apparatus and a method of data processing system that uses multiply-accumulate instructions. The apparatus for processing data includes, a special register bank of N-bit data processing registers, a general register bank of N-bit data processing registers, a selector, a multiplier and an accumulator. The selector is coupled to the special register bank and the general register bank and is used for selecting one of the special and general register banks and outputting N-bit data from the selected register banks. The outputted N-bit data and the N-bit data held in the general register bank form a 2N-bit addition operand. The multiplier is used for performing multiply operation upon a first operand and a second operand and outputting an 2N-bit result. The accumulator is coupled to the multiplier, the selector and the general register bank and is used for performing accumulate operation upon the 2N-bit result and the 2N-bit addition operand and outputting a 2N-bit accumulated result.
REFERENCES:
patent: 5319588 (1994-06-01), Haines et al.
patent: 5583804 (1996-12-01), Seal et al.
patent: 6370640 (2002-04-01), Dowling
patent: 6581086 (2003-06-01), Morrison et al.
Guey Calvin
Kao Min-Cheng
Liang Ching-Jer
Chan Eddie
Faraday Technology Corp.
J.C. Patents
O'Brien Barry
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