Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Reexamination Certificate
2006-08-15
2009-06-02
Lane, Jack A (Department: 2185)
Electrical computers and digital processing systems: memory
Storage accessing and control
Specific memory composition
C711S005000, C365S222000
Reexamination Certificate
active
07543106
ABSTRACT:
A memory controller controlling a plurality of semiconductor memory devices includes a refresh control circuit controlling refresh operations of the semiconductor memory devices according to positional information of memory chips of the memory devices. The refresh control circuit classifies the semiconductor memory devices into first and second groups and sets an auto refresh interval of the semiconductor memory devices belong to the first group and an auto refresh interval of the semiconductor memory devices belong to the second group different from each other.
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Notice to Submit Response and English-language translation issued Sep. 21, 2006 in counter patent application No. 10-2005-0105293.
Lane Jack A
Mills & Onello LLP
Samsung Electronics Co,. Ltd.
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