Apparatus and method for controlling operating mode in semicondu

Details Apparatus and method for controlling operating mode in semicondu Apparatus and method for controlling operating mode in semicondu

1995-11-30

1998-07-14

Fears, Terrell W.

Static information storage and retrieval

Read/write circuit

Testing

36518901, G11C 1300

Patent

active

057814856

ABSTRACT:
An apparatus and method for controlling an operating mode in a semiconductor memory device is provided. During test mode, test mode selection signals are supplied to the memory device according to test mode commands received from an external pad and decoded internally. During both test mode and user mode, user mode selection signals are supplied to the memory device according to user mode commands received from an external pad and decoded internally. Upon receipt of a test release command, test mode commands are fusably disabled, such that entry into test mode and decoding of test mode commands is thereafter prevented.

REFERENCES:
patent: 4428068 (1984-01-01), Baba
patent: 4903236 (1990-02-01), Nakayama et al.
patent: 5235549 (1993-08-01), Young et al.

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