Electrical computers and digital processing systems: support – Digital data processing system initialization or configuration – Loading initialization program
Reexamination Certificate
2006-06-06
2006-06-06
Elamin, A. (Department: 2116)
Electrical computers and digital processing systems: support
Digital data processing system initialization or configuration
Loading initialization program
C713S401000, C712S208000, C711S200000, C710S260000, C710S052000, C365S230060
Reexamination Certificate
active
07058799
ABSTRACT:
An apparatus and method for transferring signals between timing domains. The apparatus includes a receiver for receiving signals operative in a first timing domain, a decoder for at least partially decoding the signals to generate at least one decoded signal, and an output timing register for outputting the at least one decoded signal in a second timing domain. The signals transferred from the first timing domain to the second timing domain may include, for example, command and/or address signals. The first and second timing domains need not have any predetermined phase relationship. By at least partially decoding the signals during the transfer between the first and the second timing domains, the latency introduced by the timing domain transfer is employed for a useful purpose.
REFERENCES:
patent: 5425061 (1995-06-01), Laczko et al.
patent: 5777931 (1998-07-01), Kwon et al.
patent: 5784639 (1998-07-01), Abramson
patent: 6000022 (1999-12-01), Manning
patent: 6272070 (2001-08-01), Keeth et al.
patent: 6279090 (2001-08-01), Manning
patent: 6304510 (2001-10-01), Nobunaga et al.
patent: 6333893 (2001-12-01), Keeth et al.
patent: 6338127 (2002-01-01), Manning
patent: 6366991 (2002-04-01), Manning
patent: 6414903 (2002-07-01), Keeth et al.
patent: 6434081 (2002-08-01), Johnson et al.
patent: 6434684 (2002-08-01), Manning
patent: 6445643 (2002-09-01), Keeth
patent: 6449674 (2002-09-01), Yun et al.
patent: 6587804 (2003-07-01), Johnson et al.
patent: 6605970 (2003-08-01), Keeth et al.
patent: 6606041 (2003-08-01), Johnson et al.
patent: 6658523 (2003-12-01), Janzen et al.
patent: 6674378 (2004-01-01), Johnson et al.
patent: 6678205 (2004-01-01), Johnson et al.
patent: 6687185 (2004-02-01), Keeth et al.
patent: 6725388 (2004-04-01), Susnow
patent: 6747997 (2004-06-01), Susnow et al.
patent: 6848013 (2005-01-01), Suh et al.
patent: 2003/0017881 (2003-06-01), Johnson et al.
Dally, William J., et al., “Digital Systems Engineering”,Cambridge University Press, Cambridge, UK—ISB4 0-521-59292-5 (66), pp. 477-479.
Elamin A.
Micro)n Technology, Inc.
Wong, Cabello, Lutsch, Rutherford & Brucculeri
LandOfFree
Apparatus and method for clock domain crossing with... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Apparatus and method for clock domain crossing with..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Apparatus and method for clock domain crossing with... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3702986