Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2001-03-14
2003-03-25
Wong, Don (Department: 2821)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000
Reexamination Certificate
active
06539534
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to programmable logic devices (PLDs) and particularly to design methods for PLDs.
BACKGROUND OF THE INVENTION
FIG. 1
is a flow diagram illustrating a conventional circuit design process that is used to design circuits implemented on PLDs, and also to design application specific integrated circuits (ASICs).
The conventional circuit design process begins in step
101
by defining a desired circuit using known schematic capture tools or hardware description languages (HDL) such as VHDL and Verilog. In addition, the circuit definition step requires defining a set of input signals and associated desired output signals that are to be generated by the circuit design. Because conventional circuit schematic capture and HDL are often cryptic and complex, the step of defining the desired circuit is often time consuming.
After the desired circuit is defined in step
101
, the circuit definition is then synthesized using known software tools (step
102
), and then simulated (step
103
) in software. If bugs are detected in the circuit simulation, i.e., the synthesized circuit definition fails to generate the desired output signals in response to the defined input signals (Bugs Found in step
104
), then the circuit definition is manually modified (step
105
), synthesized (step
102
) and simulated (
103
) until a suitable finalized circuit design is achieved (step
106
). Note that, in step
105
, the circuit designer must manually alter the design definition to fix the bugs. Most of the design time in the conventional circuit design process is spent in debugging the circuit design (step
104
) and manually fixing bugs (step
105
) to generate a finalized circuit design (step
106
). In the case of circuit designs implemented on PLDs, the finalized circuit design is then converted into a bitstream (step
107
) that can be loaded into a target PLD.
As mentioned above, the conventional circuit design process is complex and time consuming because the logic performed by the desired circuit must be defined using, for example, a schematic capture tool. In addition, the process of debugging a circuit definition often requires significant time and resources.
Third party vendors are presently attempting to address the complexity of the conventional circuit design process by providing software tools that generate a circuit design based only on the desired circuit behavior (i.e. predefined output signals are associated with a given set of input signals) without the use of a logic description defined using schematic capture or HDL. One such method is entitled “Method for Converting a Hardware Independent User Description of a Logic Circuit into Hardware Components” by Gregory et al., U.S. Pat. No. 5,530,841. These attempts use a single pass through a software algorithm to generate a single candidate circuit based on the desired circuit behavior. A bitstream is then generated from this single candidate circuit to finalize this conventional design without hardware verification. Although the resulting circuit design process is much less time consuming than the conventional design process, a problem arises in that the behavior characteristics of the candidate circuit generated may not match the characteristics of the desired circuit.
What is needed is an automatic method of generating a circuit design using desired circuit behavior that is guaranteed to operate in its target device, for example, a target PLD.
SUMMARY OF THE INVENTION
The present invention is directed to an apparatus and a method for designing a circuit having desired output characteristics by iteratively evaluating the hardware implementations of intermediate designs. The initial circuit is defined in response to specified input characteristics. By using only the input and output characteristics of the desired circuit, the cryptic and complex methods of circuit description, such as schematic capture or HDL, is prevented. As a result, the process of design definition takes less time and is significantly simplified, and the most time consuming steps of debugging and bug fixing are fully automated.
Desired circuit characteristics are defined at the beginning of the design process. An algorithm is used to generate a candidate circuit from the desired circuit characteristics. This candidate circuit may be recursively modified to ensure that the final circuit behavior matches the desired circuit characteristics.
In contrast with the conventional software-only approach, the present invention programs a PLD with a bitstream generated from the candidate circuit. The programmed PLD is tested with a hardware stimulating test apparatus to provide actual output characteristics in response to the specified input characteristics. This stimulating test apparatus stimulates the PLD and records the actual PLD response characteristics. If the actual PLD response characteristics and the desired circuit characteristics do not match, then the candidate circuit is modified and re-tested recursively until a final circuit solution is obtained based solely on characteristic behavior. This recursive process may be accomplished automatically or manually. In this way, the final circuit output characteristics match the desired output characteristics.
REFERENCES:
patent: 4964056 (1990-10-01), Bekki et al.
patent: 5517132 (1996-05-01), Ohara
patent: 5530841 (1996-06-01), Gregory et al.
patent: 5801958 (1998-09-01), Dangelo et al.
patent: 5812414 (1998-09-01), Butts et al.
patent: 5867397 (1999-02-01), Koza et al.
U.S. patent application Ser. No. 09/335,862, Levi et al., filed Jun. 17, 1999.
Bever Hoffman & Harms
Dinh Trinh Vo
Harms Jeanette S.
Xilinx , Inc.
Young Edel M.
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