Static information storage and retrieval – Read/write circuit – Precharge
Patent
1994-07-07
1995-07-18
Nelms, David C.
Static information storage and retrieval
Read/write circuit
Precharge
365189110, 365204, G11C 700, G11C 1140
Patent
active
054348226
ABSTRACT:
A precharge circuit for adjusting and maintaining a bitline of a ROM to a pre-determined precharge voltage. The circuit is comprised of P-channel pull-up transistors for initially placing an input line and a node of the precharge circuit at the supply voltage. A relatively small transistor is coupled to the node. Its function is to pull the node's voltage down when a control signal is activated. A larger transistor is also coupled to the node. The larger transistor is used to compensate for the pull down action of the small transistor. The relative sizes of the small transistor versus the larger transistor is made such that the node is placed at the desired quiescent level. The node is maintained at this level until the wordline is activated and the programmed bitline begins discharging. When discharging of the bitline causes the node's voltage to fall below a given threshold voltage through the source follower action of the large transistor, the output from the circuit is pulled down hard to a ground level.
REFERENCES:
patent: 4943943 (1990-07-01), Lai
patent: 5187686 (1993-02-01), Tran et al.
patent: 5202855 (1993-04-01), Morton
Creek Robert D.
Deleganes Daniel J.
Intel Corporation
Nelms David C.
Nguyen Tan
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