Apparatus and method for a direct-sense sense amplifier with a s

Details Apparatus and method for a direct-sense sense amplifier with a s Apparatus and method for a direct-sense sense amplifier with a s

1996-11-25

1998-08-04

Nelms, David C.

Static information storage and retrieval

Read/write circuit

Flip-flop used for sensing

36523008, G11C 700

Patent

active

057904677

ABSTRACT:
In a dynamic random access memory, the sense amplifiers associated with the storage cells have the direct sense circuitry (MNEW, MNWE.sub.--, MNRD, MNRD.sub.--) included therewith to minimize the effects of parasitic impedance. In addition, the Y-select circuits (MNYS, MNYS.sub.--) are combined with the read/write enable circuits (MNWE, MNWE.sub.--, MNRD, MNRD.sub.--) to eliminate a transistor pair, thereby reducing the required layout area. By locating the Y-select (MNYS, MNYS.sub.--) circuits between the sense amplifier MNWE, MNWE.sub.--, MNRD, MNRD.sub.--) and the local input/output lines (LIO, LIO.sub.--), the WRITE-ENABLE and the READ-ENABLE signals can be combined in a single signal.

REFERENCES:
patent: 5034636 (1991-07-01), Reis et al.
patent: 5274598 (1993-12-01), Fujii et al.
patent: 5293338 (1994-03-01), Ihara
patent: 5568073 (1996-10-01), McClure
patent: 5568434 (1996-10-01), Jeon
patent: 5585747 (1996-12-01), Proebsting
patent: 5604697 (1997-02-01), Takahashi et al.

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