Antifuse structures, antifuse array structures, methods of...

Details Antifuse structures, antifuse array structures, methods of... Antifuse structures, antifuse array structures, methods of...

2008-06-30

2011-11-15

Landau, Matthew (Department: 2813)

Active solid-state devices (e.g., transistors, solid-state diode

Integrated circuit structure with electrically isolated...

Passive components in ics

C257SE23147, C438S131000

Reexamination Certificate

active

08058701

ABSTRACT:
Antifuse structures, antifuse arrays, methods of manufacturing, and methods of operating the same are provided. An antifuse structure includes bitlines formed as first diffusing regions within a semiconductor substrate, an insulation layer formed on the bitlines, and wordlines formed on the insulation layer. An antifuse array includes a plurality of antifuse structures arranged in an array.

REFERENCES:
patent: 7564707 (2009-07-01), Kleveland
patent: 7638855 (2009-12-01), Lung
patent: 2007/0042553 (2007-02-01), Kuesters et al.
patent: 2008/0246098 (2008-10-01), Kurjanowicz
patent: 000509631 (1992-10-01), None
patent: 2003086768 (2003-03-01), None
Quirk et al., Semiconductor Manufacturing Technology, Prentice Hall, Upper Saddle NJ, © 2001, pp. 286-287,506.

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