Electrical computers and digital data processing systems: input/ – Interrupt processing – Interrupt queuing
Reexamination Certificate
2005-07-19
2005-07-19
Lefkowitz, Sumati (Department: 2111)
Electrical computers and digital data processing systems: input/
Interrupt processing
Interrupt queuing
C710S263000, C710S262000, C710S266000
Reexamination Certificate
active
06920516
ABSTRACT:
An anti-starvation interrupt protocol for use in avoiding livelock in a multiprocessor computer system is provided. At least one processor is configured to include first and second control status registers (CSRs). The first CSR buffers information, such as interrupts, received by the processor, while the second CSR keeps track of the priority level of the interrupts. When an interrupt controller receives an interrupt, it issues a write transaction to the first CSR at the processor. If the first CSR has room to accept the write transaction, the processor returns an acknowledgement, whereas if the first CSR is already full, the processor returns a no acknowledgment. In response to a no acknowledgment, the interrupt controller increments an interrupt starvation counter, and checks to see whether the counter exceeds a threshold. If not, the interrupt controller waits a preset time and reposts the write transaction. If it does, the interrupt controller issues a write transaction having a higher priority to the second CSR. In response, the processor copies all of the pending interrupts from the first CSR into the memory subsystem, thereby freeing up the first CSR to accept additional write transactions.
REFERENCES:
patent: 5325536 (1994-06-01), Chang et al.
patent: 5379428 (1995-01-01), Belo
patent: 5452452 (1995-09-01), Gaetner et al.
patent: 5504894 (1996-04-01), Ferguson et al.
patent: 5579525 (1996-11-01), Suzuki
patent: 5606703 (1997-02-01), Brady et al.
patent: 5754866 (1998-05-01), Priem
patent: 5819112 (1998-10-01), Kusters
patent: 5875341 (1999-02-01), Blank et al.
patent: 5875343 (1999-02-01), Binford et al.
patent: 5881296 (1999-03-01), Williams et al.
patent: 5913045 (1999-06-01), Gillespie et al.
patent: 5931936 (1999-08-01), Chung et al.
patent: 5933613 (1999-08-01), Tanaka et al.
patent: 6021456 (2000-02-01), Herdeg et al.
patent: 6035376 (2000-03-01), James
patent: 6078997 (2000-06-01), Young et al.
patent: 6085279 (2000-07-01), Suzuki
patent: 6105085 (2000-08-01), Farley
patent: 6260100 (2001-07-01), Kessler
patent: 6389526 (2002-05-01), Keller et al.
patent: 6442631 (2002-08-01), Neufeld et al.
patent: 6480918 (2002-11-01), McKenney et al.
patent: 6532501 (2003-03-01), McCracken
patent: 6629252 (2003-09-01), Gholami et al.
James Peterson and Abraham Silberschatz, “Operating System Concepts”, 1985, Addison Westley inc., vol. 2, pp. 120-122.
Hwa-Chun Lin, Ge-Ming Chiu, and C.S. Raghavendra, “Performance Study of Dynamic Load Balancing Policies for Distributed Systems with Service Interruptions”, 1991, IEEE.
Interfacing the PC, Quality Information in one Place . . . , http://www.beyondlogic.org/interrupts/interrupt.htm, pp. 1-18.
An Introduction to Interrupts, http://goforit.unk.edu/asm/ints_.htm, (co) 1988-2000, pp. 1-14.
Duncan Samuel H.
Golden David J.
Hartwell David W.
Mayo David T.
King Justin
Lefkowitz Sumati
LandOfFree
Anti-starvation interrupt protocol does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Anti-starvation interrupt protocol, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Anti-starvation interrupt protocol will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3375232