Optics: measuring and testing – Inspection of flaws or impurities
Reexamination Certificate
2011-06-14
2011-06-14
Nguyen, Tu T (Department: 2886)
Optics: measuring and testing
Inspection of flaws or impurities
Reexamination Certificate
active
07961307
ABSTRACT:
A structure for locating a fault in a semiconductor chip. The chip includes a substrate on a dielectric interconnect. A first electrical response image of the chip, which includes a spot representing the fault, is overlayed on a first reflection image for monochromatic light in an optical path from an optical microscope through a SIL/NAIL and into the chip. The index of refraction of the substrate exceeds that of the dielectric interconnect and is equal to that of the SIL/NAIL. A second electrical response image of the chip is overlayed on a second reflection image for the monochromatic light in an optical path in which an optical stop prevents all subcritical angular components of the monochromatic light from being incident on the SIL/NAIL. If the second electrical response image includes or does not include the spot, then the fault is in the substrate or the dielectric interconnect, respectively.
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Ippolito Stephen Bradley
Miles Darrell L.
Song Peilin
Sylvestri John D.
Dougherty Ann
International Business Machines - Corporation
Nguyen Tu T
Schmeiser Olsen & Watts
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