Amorphous silicon layer for top surface of semiconductor device

Details Amorphous silicon layer for top surface of semiconductor device Amorphous silicon layer for top surface of semiconductor device

1995-08-16

1996-06-04

Brown, Peter Toby

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257409, 257636, 257646, 257784, H01L 2329, H01L 2348

Patent

active

055236049

ABSTRACT:
A layer of amorphous silicon covers the top surface of a semiconductor wafer to act as a moisture and contaminant barrier and to prevent the formation of aluminum hillocks on the aluminum bonding pads for the source and gate electrodes of a power MOSFET or other power semiconductor device. The amorphous silicon is easily penetrated by wire bonding apparatus used to make wire bonds to the conductor pads beneath the amorphous silicon.

REFERENCES:
patent: 4134125 (1979-01-01), Adams et al.
patent: 4972250 (1990-11-01), Omori et al.
patent: 4984061 (1991-01-01), Matsumoto
patent: 5029324 (1991-07-01), Osawa et al.
patent: 5268586 (1993-12-01), Mukherjee et al.

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