Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1999-03-11
2000-12-19
Bowers, Charles
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438266, H01L 21336
Patent
active
061626848
ABSTRACT:
In one embodiment, the present invention relates to a method of forming a flash memory cell, involving the steps of forming a tunnel oxide on a substrate; forming a first polysilicon layer over the tunnel oxide; forming an insulating layer over the first polysilicon layer, the insulating layer comprising an oxide layer made by low pressure chemical vapor deposition at a temperature from about 600.degree. C. to about 850.degree. C. using SiH.sub.4 and N.sub.2 O, annealing in an NH.sub.3 atmosphere at a temperature from about 800.degree. C. to about 900.degree. C., and wet oxidizing using O.sub.2 and H.sub.2 at a temperature from about 820.degree. C. to about 880.degree. C.; forming a second polysilicon layer over the insulating layer; etching at least the first polysilicon layer, the second polysilicon layer and the insulating layer, thereby defining at least one stacked gate structure; and forming a source region and a drain region in the substrate, thereby forming at least one memory cell.
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Chang Kent Kuohua
Chi David
Sun Chin-Yang
Advanced Micro Devices , Inc.
Bowers Charles
Chen Jack
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