Advanced nor-type mask ROM

Details Advanced nor-type mask ROM Advanced nor-type mask ROM

1999-01-19

2000-11-21

Thomas, Tom

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257390, 257392, H01L 2976, H01L 2994, H01L 31062, H01L 31113, H01L 31119

Patent

active

061507008

ABSTRACT:
A NOR-type mask ROM includes a semiconductor substrate of a first conductivity type. A plurality of buried diffusion regions of a second conductivity type opposite to the first conductivity type are arranged in parallel on the substrate to serve as sources and drains. A plurality of channel regions are defined between the buried diffusion regions and a plurality of gate insulating layers are formed on the channel regions. A plurality of gate regions are formed in parallel on the gate insulating layers, intersecting the buried diffusion regions, and overlapping with the channel regions, to be provided as word lines. An insulating layer is deposited on the overall surface of the substrate, covering the gate regions, and a plurality of sub-gate regions are formed into spacers on the sidewalls of the insulating layer, in parallel with the gate regions, for increasing a cell current.

REFERENCES:
patent: 5117389 (1992-05-01), Yiu
patent: 5358879 (1994-10-01), Brady et al.
patent: 5877537 (1999-03-01), Aoki

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