Advanced JFET with reliable channel control and method of...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having junction gate

Reexamination Certificate

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C438S199000, C438S223000, C438S238000, C438S329000, C438S365000, C257S077000, C257S192000, C257S273000, C257S339000, C257SE21033, C257SE21036

Reexamination Certificate

active

07736962

ABSTRACT:
A junction field effect transistor comprises an insulating layer formed in a substrate. A source region of a first conductivity type is formed on the insulating layer, and a drain region of the first conductivity type is formed on the insulating layer and spaced apart from the drain region. A channel region of the first conductivity type is located between the source region and the drain region and formed on the insulating layer. A gate region of the second conductivity type surrounds all surfaces of a length of the channel region such that the channel region is embedded within the gate region.

REFERENCES:
patent: 3755012 (1973-08-01), George et al.
patent: 2008/0308816 (2008-12-01), Miller et al.

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