Advanced damascene planar stack capacitor fabrication method

Details Advanced damascene planar stack capacitor fabrication method Advanced damascene planar stack capacitor fabrication method

1996-11-19

1998-05-19

Wojciechowicz, Edward

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257309, 257310, 257532, H01L 2972

Patent

active

057539480

ABSTRACT:
Capacitor storage charge can be increased by increasing storage node area. A high aspect surface ratio stack capacitor is produced without increasing overall cell dimensions. The node is formed with layers of low doped and high doped concentration borophosphosilicate glass which is deposited by a single process step with precise nanometer dimensions, are selectively etched so that either doped or undoped layers will have a higher etch rate. This etching creates finger-like projections in the node, which provide for greater surface area using a very simplified process requiring fewer processing steps.

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