Advanced copper damascene structure

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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C438S701000, C438S740000, C257S758000

Reexamination Certificate

active

07125791

ABSTRACT:
A method of forming round bottom corners for conductive lines in an integrated circuit is presented. Two approaches are taken to achieve a preferred rounding profile. For both approaches, a trench is formed and conductive materials are filled in the trench. The etch stop layer (ESL) approach involves forming an ESL underlying an inter-level dielectric (ILD). After etching a trench in the ILD, the ESL is etched to further round trench corners. The chemistry approach involves changing the etching chemistry when etching the trench. The two approaches can be used separately or combined in the preferred embodiments of the present invention. In a preferred embodiment, a via structure comprising two copper lines and an interconnecting via is formed. By using the ESL and chemistry approaches, the bottom corners are formed substantially round. The preferred embodiment of the present invention is applied to conductive features that are close enough to cause time dependent dielectric breakdown.

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Wang, X., et al., “In-Situ Shallow Trench Isolation Etch with Clean Chemistry,” IEEE/CPMT Int'l Electronics Manufacturing Technology Symposium, 1998, pp. 150-154.

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