Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses – Using delay
Reexamination Certificate
1999-02-11
2001-08-14
Butler, Dennis M. (Department: 2182)
Electrical computers and digital processing systems: support
Synchronization of clock or timing signals, data, or pulses
Using delay
C713S503000
Reexamination Certificate
active
06275950
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to an adjustable PCI asynchronous clock device, particularly to a circuit by which the clock signal of the PCI slot is regulated so that the clock signal of add-on card and the computer signal of a computer are synchronous and so that the add-on card can match the PCI slot.
BACKGROUND OF THE INVENTION
Currently, the greatest drawback encountered in mother board manufactures is that, in mounting the add-on cards, after all kinds of the add-on cards are inserted accurately into the PCI slots, a few cards cannot work properly. Only a few cards can work normally, which is the so-called matching problem because not all the add-on cards match with the PCI slots in signal transmission. The main reason of the matching problem is that at PCI bus, no matter the computer signals are command, address, data, etc., the rising edge of the PCI clock is used to latch the computer signals, and if the PCI clock signal deviates from the computer signal, the setup time or holding time obtained by latching the computer signal are insufficient. Further, the design and manufacturing of the system chip set of the mother board are different from those of the chip set of the add-on cards, which makes the matching problem severe and difficult to be solved. The user usually finds the matching problem when the user adds peripheral device, which results in the returning of the computer and the difficulty of repairing service.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide an adjustable PCI asynchronous clock device in which by using the settings of firmware, after the control line is monitored and selected by using a multiplexer via a I/O port, each of the PCI slots chooses one delay unit of the time delay means. The clock signal for each kind of PCI slot is delayed by the time delay means in order to regulate the clock signals of the chip set on the PCI add-on cards to be synchronous to the computer signals of the system chip set so that the add-on cards match the PCI slots.
These and other features of the present invention will become apparent from the following descriptions when read in conjunction with the accompanying drawings.
REFERENCES:
patent: 5696949 (1997-12-01), Young
patent: 5881271 (1999-03-01), Williams
patent: 5884052 (1999-03-01), Chambers et al.
patent: 6006327 (1999-12-01), Chang et al.
Butler Dennis M.
Proskauer Rose LLP
Twinhead International Corp.
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