Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Encapsulating
Reexamination Certificate
2001-06-04
2002-12-03
Nguyen, Tuan H. (Department: 2813)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Encapsulating
C438S928000, C257S701000
Reexamination Certificate
active
06489186
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates in general to a semiconductor die packaging technique and, more particularly, to a die having a metal layer back side for enhanced adhesion of the die in a Leads On Chip (LOC) package system.
2. State of the Art
A semiconductor integrated circuit (IC) packaged device generally includes an IC chip (die) being connected to inner leads of a lead frame by wire bonds. The chip, wire bonds, and inner leads are completely encapsulated (packaged) for protection with a substance, such as plastic. Outer leads communicate with the inner leads of the lead frame, but the outer leads typically remain exposed for mounting of the packaged device to external circuitry, such as a printed circuit board. Conventionally, encapsulation occurs by a transfer molding technique wherein the encapsulation substance is a thermoset epoxy molded around and to the die and lead frame and subsequently cured.
In a conventional IC packaged device, a semiconductor die is placed on and bonded to a center die paddle of a lead frame for support. Inner lead fingers of the lead frame approach the paddle but do not contact or communicate with the paddle. Rather, wire bonds communicate between contact pads on the die and the inner lead fingers of the lead frame by spanning the gap between the die and the fingers. The wire bonds allow for the transmission of the electrical signals to and from the die and the lead frame.
However, to shrink the conventional packaging requirements, techniques such as the Lead On Chip (LOC) method have been developed. The LOC technique disposes the inner lead fingers of a lead frame directly over the die (or IC chip) rather than away from the die. Double-sided adhesive insulating tape attaches the conductive lead fingers to the die so that no gap exists between the die and lead fingers. Wire bonds communicate between the contact pads on the die and the inner lead fingers which are disposed over the insulating tape directly over a portion of the die adjacent the die pads.
This LOC technique allows the entire packaging of the IC device to be smaller because the inner lead fingers are disposed directly over the die rather than separate from the die. Similar to LOC, other variations of using an adhesive tape for adhering lead fingers and, consequently, shrinking packaging requirements include a Tape Under Frame technique and a Leads Under Die method.
Although IC packaging is minimized in each of these packaging techniques that uses an adhesive tape, other problems surface. One such problem in the LOC technique is the difficulty of obtaining a good, solid adhesive bond between the die and the package. One reason a solid bond is not achieved is because the oxide on the silicon die substrate does not lend itself to uniform wetting, which is necessary for good adhesion with the liquid mold compound.
When a die does not bond well with the mold compound package, delamination may occur and the device may potentially be ruined during the manufacturing process or surface mount of the package. Since production environment areas retain a substantial humidity level to reduce static buildup, i.e., often about 50%, moisture absorbs into the mold compound and can penetrate delaminated areas between the die and mold compound. When the moisture is converted to steam from heat processes and the steam pressure is greater than the strength of the adhesion couple between the mold compound and the die, the mold compound will crack or explode with a “popcorn” effect.
To overcome this potential package cracking problem, one technique has been to bake the moisture out of the mold compound to ensure a low moisture content within the package. Another step is to place the device in a “dry package” for shipping purposes by placing the final semiconductor chip product in a shipping container with a desiccant drying agent, such as silica gel. Although these techniques are commonly used in the semiconductor industry, they provide only a temporary solution. Namely, when a semiconductor manufacturer ships a “dried” packaged device by following these techniques, the device may still absorb moisture at a customer's site after the device is removed from the shipping container materials. Furthermore, if the die has delaminated even slightly, the package is subject to moisture penetration again and the package may subsequently crack if exposed to sufficient heat.
Another technique for reducing delamination potential is disclosed in U.S. Pat. No. 5,227,661 issued to Heinen on Jul. 13, 1993. Although this method provides a working solution, it retains disadvantages by its use of aminopropyltriethox-silane as a coating on the die.
Obviously, the foregoing problems and solutions associated with providing a good bond between a die and a die package to avoid delamination and cracking of the package are undesirable aspects of conventional semiconductor packaging techniques. Accordingly, objects of the present invention are to provide an improved bonding between a semiconductor die and its encapsulating package in order to decrease delamination potential of the die from the package.
SUMMARY OF THE INVENTION
According to principles of the present invention in its preferred embodiment, a back side of a semiconductor die includes a metal layer deposited thereon for enhancing adhesion between the die and a mold compound package. The metal layer is substantially oxide free. The die is coated with a layer or layers of copper (Cu) and/or palladium (Pd) by electroplating or electroless coating techniques.
According to further principles of the present invention, the metal layer preferably comprises approximately 50 micro inches of a Cu layer deposited over the back side of the die and approximately 2 to 3 micro inches of a Pd layer deposited over the Cu layer.
Advantageously, the metal layer on the die provides a uniform wetting surface for better adhesion of the die with the mold compound during encapsulation. The increased adhesion reduces delamination potential of the die from the package and, consequently, reduces cracking of the package.
The aforementioned principles of the present invention provide an adhesion enhanced semiconductor die for improving adhesion of the die with a mold compound packaging. Other objects, advantages, and capabilities of the present invention will become more apparent as the description proceeds.
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Brooks J. Mike
King Jerrold L.
Moden Walter L.
Berezny Nema
Nguyen Tuan H.
TraskBritt
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