Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2001-11-08
2003-11-25
Tran, Minh Loan (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S308000, C257S309000, C257S310000, C257S534000
Reexamination Certificate
active
06653681
ABSTRACT:
STATEMENT REGARDING FEDERALY SPONSORED RESEARCH OR DEVELOPMENT
Not Applicable
INCORPORATION-BY-REFERENCE OF MATERIAL SUBMITTED ON A COMPACT DISC
Not Applicable
REFERENCE TO A “MICROFICHE APPENDIX”
Not Applicable
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to integrated circuit structures and fabrication methods, and particularly to capacitor structures.
2. Description of Related Art
MIM (metal-insulator-metal) capacitors are used in integrated circuits, particularly in analog applications. MIM capacitors typically comprise multiple levels of interdigitated metal fingers that are stacked and biased to maximize coupling. Insulating dielectric material fills the space between and around these metallized lines.
BRIEF SUMMARY OF THE INVENTION
The present application discloses an improvement to capacitor structures on integrated circuits. In the preferred embodiment, a polysilicon pattern is deposited and covered by nitride sidewalls. This is done by a blanket nitride deposition which is isotropically etched back to just cover the edges of the poly. The nitride, having a high dielectric constant, enhances the corner and lateral capacitance of at least the first level of the MIM capacitor structure. The poly pattern is optimized so that a maximum amount of area is covered by the nitride sidewalls (i.e., the percent of intralevel gap filled with nitride is maximized), adding further to the capacitance of the MIM structure.
Advantages of the disclosed methods and structures, in various embodiments, can include one or more of the following:
increases capacitance with no added process steps;
uses chip space that is typically unused.
REFERENCES:
patent: 3904996 (1975-09-01), Rosenfeld
patent: 2001/0018098 (2001-08-01), Sun et al.
Brady III W. James
Keagy Rose Alyssa
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
Tran Minh Loan
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