Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
Reexamination Certificate
2000-09-12
2002-03-12
Tokar, Michael (Department: 2819)
Electronic digital logic circuitry
Signal sensitivity or transmission integrity
Bus or line termination
C326S086000, C326S090000, C710S108000, C710S120000, C333S02200F, C333S032000, C333S017300
Reexamination Certificate
active
06356106
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates generally to the field of computer bus systems, and more particularly to the active termination of a transmission line in a multidrop memory system.
BACKGROUND OF THE INVENTION
In the design and implementation of electronic systems, such as digital computers and consumer electronic devices, undesired transmission line effects are a major concern. As signals propagate down the system's transmission lines, e.g., traces on a printed circuit board (PCB), unwanted signal reflections may occur on the lines. The reflections are a result of mismatched impedances between the driver impedance, receiver impedances, and interconnecting transmission lines. The reflections and other undesired transmission line effects are often exacerbated as the operating speed of the system increases. If left uncorrected, the reflections may cause the signal's voltage to swing outside of the defined “0” or “1” voltage levels, thereby causing the receiving device to incorrectly interpret the received signal. An incorrect interpretation of the received signal will cause the receiving device to respond incorrectly and possibly generate an erroneous result.
Termination is used in high-speed signaling systems to improve signal integrity and operating bandwidth by minimizing transmission line reflections. Series terminated lines provide improvement by minimizing reflections that would have otherwise occurred at the driving node. Series termination does not increase the power dissipation relative to unterminated transmission lines. In general, parallel termination schemes can provide greater bandwidth than series termination, but power dissipation increases due to the current flowing through the parallel resistor to its reference supply. To supply the termination current, the driver current must be increased. To increase the driver current, the driver sizes must increase, which also means that the overall circuit capacitance will increase. These factors can offset some of the bandwidth improvements that parallel schemes offer.
Another disadvantage of both the series and parallel termination schemes is the increased cost associated with adding the termination resistors to the system. In addition, both termination schemes use an increased area on the PCB to implement the termination resistors. It is desirable to decrease the cost and PCB area attributable to the current termination schemes.
High-speed memory subsystems, such as double data rate (DDR) synchronous dynamic random access memory (SDRAM) systems, often employ series and/or parallel termination resistors to maximize the system operating bandwidth. These systems are typically bussed systems with multiple driving and receiving locations along the bus (the bus is often referred to as a “multidrop bus” and the system is often referred to as a “multidrop system”) and are thus different than point-to-point systems (typically having one main driving location and one main receiving location on the bus). From a signal standpoint, the provision of multiple devices on the multidrop bus can be problematic since the devices represent electrical stubs to the bus, which leads to reflections on the bus. These reflections degrade the signal integrity and therefore, limit the maximum bandwidth and timing margin of the multidrop system. Thus, the multidrop bus requires a termination scheme. Unfortunately, the termination schemes in the multidrop systems also suffer from the above-mentioned shortcomings.
Accordingly, there is a desire and need for a termination scheme in a multidrop system that improves signal integrity on the system transmission line, yet does not substantially increase the cost of the system. There is also a desire and need for a termination scheme in a multidrop system that improves signal integrity on the system transmission line, yet does not take up precious space on the system PCB.
SUMMARY OF THE INVENTION
The present invention provides a termination scheme in a multidrop system that improves signal integrity on the system transmission line, yet does not substantially increase the cost of the system.
The present invention also provides a termination scheme in a multidrop system that improves signal integrity on the system transmission line, yet does not take up substantial space on the system PCB.
The above and other features and advantages are achieved by incorporating an active termination circuit in the devices connected to a multidrop bus. By including the active termination circuit on the devices instead of the bus, termination resistors can be removed from the system PCB, which saves costs and frees up precious space on the PCB. The active termination circuit has a termination enabled state and a termination disabled state. The active termination circuit is selectively placed into the enabled or disabled states in specified devices depending upon, for example, device location or communication traffic on the bus. The multidrop system can also utilize a separate passive termination mechanism in combination with the active termination circuits utilized in the devices.
It should be noted that active termination schemes have been employed in receivers of point-to-point systems having only two devices. The present invention, however, employs selectable active termination in a multidrop memory system, where termination is activated on a subset of the devices connected to the multidrop bus. In the present invention, the activation of the termination is based on the device location, and on which devices are communicating. Additionally, the termination of the present invention may or may not be activated on all devices intending to receive data.
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“Active Switches amd Active Termination for SDRAM-DDR Memory Dimms,” 6/1998.
Greeff Roy
Harrison Ron
Lee Terry R.
Dickstein , Shapiro, Morin & Oshinsky, LLP
Micro)n Technology, Inc.
Tan Vibol
Tokar Michael
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