Electrical computers and digital processing systems: support – Computer power control – Power conservation
Reexamination Certificate
2000-08-08
2004-02-10
Heckler, Thomas M. (Department: 2185)
Electrical computers and digital processing systems: support
Computer power control
Power conservation
C711S170000
Reexamination Certificate
active
06691237
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The devices and processes described herein relate, in general, to management of memory devices in data processing systems.
2. Description of the Related Art
Data processing systems are systems that manipulate, process, and store data. Personal computer systems, and their associated subsystems, constitute well-known examples of data processing systems.
Personal computer systems typically utilize memory devices. One type of memory device so utilized is known in the art as RAMBUS Dynamic Random Access Memory, or RDRAM. RDRAM is a proprietary type of computer memory developed by Rambus, Inc. of Mountain View, Calif., and has been adopted for use by Intel Corporation of Santa Clara, Calif.
Operation of RDRAM memory devices consumes considerable amounts of power and produces considerable amounts of heat. In many data processing systems, (e.g., portable computer systems such as notebook and subnotebook computer systems) power and heat management constitute significant design concerns. These power and heat management design concerns have been recognized by RDRAM designers and developers, and thus the RDRAM specification provides defined power management policies.
The inventors named herein have discovered, and such discovery forms part of the inventive content herein, that RDRAM pooling policies can be tailored to monitored memory use in order to provide near-optimum power management and performance. It has also been discovered that the foregoing discovery can be extended to benefit other memory devices which utilize pooling schemes.
SUMMARY OF THE INVENTION
The inventors named herein have invented a method and related system which tailor memory device (e.g., RDRAM) pooling policies to monitored memory use in order to provide near-optimum power management and performance.
In one embodiment, a method includes but is not limited to monitoring at least one memory-accessing device, and adjusting pooling of data processing system memory devices in response to the monitoring. In one embodiment, circuitry is used to effect the foregoing-described method; the circuitry can be virtually any combination of hardware, software, and/or firmware configured to effect the foregoing-described method depending upon the design choices of the system designer.
The foregoing is a summary and thus contains, by necessity, simplifications, generalizations and omissions of detail; consequently, those skilled in the art will appreciate that the summary is illustrative only and is not intended to be in any way limiting. Other aspects, inventive features, and advantages of the devices and/or processes described herein, as defined solely by the claims, will become apparent in the non-limiting detailed description set forth below.
REFERENCES:
patent: 5404546 (1995-04-01), Stewart
patent: 5410711 (1995-04-01), Stewart
patent: 5504907 (1996-04-01), Sato et al.
patent: 5519261 (1996-05-01), Stewart
patent: 5524248 (1996-06-01), Parks et al.
patent: 5603040 (1997-02-01), Bell et al.
patent: 5675790 (1997-10-01), Walls
patent: 5675814 (1997-10-01), Pearce
patent: 5771390 (1998-06-01), Pearce et al.
patent: 5928365 (1999-07-01), Yoshida
patent: 5984116 (1999-11-01), Busch et al.
patent: 5996078 (1999-11-01), Christensen et al.
patent: 6038673 (2000-03-01), Benn et al.
patent: 6219772 (2001-04-01), Gadangi et al.
patent: 6330639 (2001-12-01), Fanning et al.
patent: 6442698 (2002-08-01), Nizar
Verdun, Gary, “RAMBUS Memory Power Management Through Active Pool Management Policies Tailored to Portable Computer User Scenarios,” filed Jan. 24, 2000; U.S. patent application Ser No. 09/490,795. (Copy not enclosed.).
“A Revolutionary Architecture for Mainstream Performance PCs in 2000,” Intel 820 Chipset, Whitepaper, pp. 1-10, 1999.
Rambus, Inc., Preliminary Information, Direct RDRAM, 128/144-Mbit (256x16/18x32s), Document DV0059, Version 1.11, pp. 1-66, Jun. 2000.
Intel 820 Chipset Family: 82820 Memory Controller Hub (MCH) Datasheet, Order Number 290630-002, pp. 1-152., Jul. 2000.
Roesle Chad P.
Verdun Gary J.
Baker & Botts L.L.P.
Dell Products L.P.
Heckler Thomas M.
LandOfFree
Active memory pool management policies does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Active memory pool management policies, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Active memory pool management policies will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3347529