A mask read only memory device

Details A mask read only memory device A mask read only memory device

1992-11-25

1994-05-31

Fears, Terrell W.

Static information storage and retrieval

Systems using particular element

Semiconductive

365178, 36518901, 365 51, G11C 1140

Patent

active

053175344

ABSTRACT:
A method for manufacturing highly integrated NAND and NOR logic mask read only memory (MROM) devices is disclosed. Over the top surface of a semiconductor substrate, where a first polysilicon layer is formed, a pattern of a gate electrode is formed along a word line in the order of odd numbers or even numbers. Next, an insulation layer having a thickness of a submicron range is formed over the top surface of the substrate. And then a photoresist is covered and an etch back process is performed. Thereafter, the exposed insulation layer caused by the etch back process and the polysilicon layer are selectively etched to form a word line spacing corresponding to a thickness of the insulation layer. Thus, spacing between adjacent word lines can be minimized and a process margin can be sufficiently ensured.

REFERENCES:
patent: 4709351 (1987-11-01), Kaogaya

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