1/f noise, offset-voltage charge injection induced error...

Details 1/f noise, offset-voltage charge injection induced error... 1/f noise, offset-voltage charge injection induced error...

2005-10-11

2005-10-11

Mai, Lam T. (Department: 2819)

Coded data generation or conversion

Analog to or from digital conversion

Analog to digital conversion

C341S161000, C341S151000

Reexamination Certificate

active

06954169

ABSTRACT:
The present invention provides an apparatus and method for reducing and canceling 1/f noise, offset voltage, and charge injection introduced in pipeline ADCs in conventional op-amp sharing techniques. The polarity of the residue signals is changed at each phase. During phase one, the residue signal of the operational amplifier is sampled on the capacitors with inverse polarity. During phase2the residue signal of the operational amplifier is sampled on the capacitors with the inverse polarity of phase one.

REFERENCES:
patent: 6323800 (2001-11-01), Chiang
patent: 6337651 (2002-01-01), Chiang
patent: 6420991 (2002-07-01), Yu
patent: 6486820 (2002-11-01), Allworth et al.
patent: 6577185 (2003-06-01), Chandler et al.
patent: 6600440 (2003-07-01), Sakurai
patent: 6617992 (2003-09-01), Sakurai
K. Nagaraj et al., “A 25-mW, 52-Msamples/s Parallel-Pipelined A/D Converter with Reduced Number of Amplifiers”, IEEE Journal of Solid State Circuits, vol. 32, No. 3, Mar. 1997, pp. 312-320.

Affiliated with

Also associated with

Rating

1/f noise, offset-voltage charge injection induced error... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with 1/f noise, offset-voltage charge injection induced error..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and 1/f noise, offset-voltage charge injection induced error... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3479469