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Packet header compression using division remainders

Electrical computers and digital processing systems: multicomput – Computer-to-computer data modifying – Compressing/decompressing
Reexamination Certificate

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Packet merging hub system for sequentially merging received data

Electrical computers and digital processing systems: multicomput – Bused computer networking
Patent

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Packet network

Electrical computers and digital processing systems: multicomput – Computer-to-computer session/connection establishing – Network resources access controlling
Patent

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Packet network interfacing

Electrical computers and digital processing systems: multicomput – Computer-to-computer data addressing
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Packet prioritization and associated bandwidth and buffer...

Electrical computers and digital processing systems: multicomput – Computer-to-computer protocol implementing – Computer-to-computer data streaming
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Packet prioritization and associated bandwidth and buffer...

Electrical computers and digital processing systems: multicomput – Computer-to-computer protocol implementing – Computer-to-computer data streaming
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Packet prioritization and associated bandwidth and buffer...

Electrical computers and digital processing systems: multicomput – Computer-to-computer protocol implementing – Computer-to-computer data streaming
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Packet prioritization and associated bandwidth and buffer...

Electrical computers and digital processing systems: multicomput – Computer-to-computer protocol implementing – Computer-to-computer data streaming
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Packet prioritization systems and methods using address aliases

Electrical computers and digital processing systems: multicomput – Computer-to-computer data routing – Prioritized data routing
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Packet prioritization systems and methods using address aliases

Electrical computers and digital processing systems: multicomput – Computer-to-computer data routing – Prioritized data routing
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Packet prioritization systems and methods using address aliases

Electrical computers and digital processing systems: multicomput – Computer-to-computer data routing – Prioritized data routing
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Packet processing architecture

Electrical computers and digital processing systems: multicomput – Network computer configuring – Reconfiguring
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Packet processing architecture

Electrical computers and digital processing systems: multicomput – Network computer configuring – Reconfiguring
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Packet processing in shared memory multi-computer systems

Electrical computers and digital processing systems: multicomput – Multicomputer data transferring via shared memory – Plural shared memories
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Packet processing relay agent to provide link layer...

Electrical computers and digital processing systems: multicomput – Computer-to-computer data routing – Alternate path routing
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Packet processing system including a policy engine having a clas

Electrical computers and digital processing systems: multicomput – Computer-to-computer session/connection establishing – Session/connection parameter setting
Patent

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Packet processing using encapsulation and decapsulation chains

Electrical computers and digital processing systems: multicomput – Computer-to-computer protocol implementing – Computer-to-computer data framing
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Packet processing using encapsulation and decapsulation chains

Electrical computers and digital processing systems: multicomput – Multiple network interconnecting
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Packet processing using encapsulation and decapsulation chains

Electrical computers and digital processing systems: multicomput – Computer-to-computer protocol implementing – Computer-to-computer data framing
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Packet processing using non-sequential encapsulation and...

Electrical computers and digital processing systems: multicomput – Computer-to-computer data routing
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