Packet prioritization systems and methods using address aliases

Electrical computers and digital processing systems: multicomput – Computer-to-computer data routing – Prioritized data routing

Reexamination Certificate

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Details

C709S224000, C709S234000, C709S235000

Reexamination Certificate

active

10261929

ABSTRACT:
A switch fabric includes input links, output links, and at least one switching element. The input links are configured to receive data items that include destination addresses. At least some of the data items have different priority levels. The output links are configured to output the data items. Each of the output links is assigned multiple ones of the destination addresses. Each of the destination addresses corresponds to one of the priority levels. The switching element(s) is/are configured to receive the data items from the input links and send the data items to ones of the output links without regard to the priority levels of the data items.

REFERENCES:
patent: 5568469 (1996-10-01), Sherer et al.
patent: 6078943 (2000-06-01), Yu
patent: 6700899 (2004-03-01), Cao
patent: 2003/0058876 (2003-03-01), Connor et al.

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