Semiconductor memory device with high speed sensing facility

Details Semiconductor memory device with high speed sensing facility Semiconductor memory device with high speed sensing facility

1989-06-01

1991-10-15

Clawson, Jr., Joseph E.

Static information storage and retrieval

Read/write circuit

Precharge

36518906, 36518911, 365205, 365208, 307475, G11C 11409

Patent

active

050580728

ABSTRACT:
A semiconductor memory device according to the present invention has a plurality of memory cells, a pair of data lines propagating the data bit, a data transfer unit responsive to address bits and operative to read out the data bit from one of the memory cells for providing the difference in voltage level between the data lines, a sense amplifier circuit having a pair of nodes and operative to increase the difference in voltage level by discharging one of the nodes, and a blocking circuit coupled between the data lines and the nodes and operative to relay the difference in voltage level between the data lines to said nodes, respectively, and the blocking circuit is further operative to isolate one of the nodes from associated data line when the node is discharged, so that the capacitive load applied to the sense amplifier circuit is drastically decreased so as to speed up the read-out operation.

REFERENCES:
patent: 3983543 (1976-09-01), Cordaro
patent: 4163907 (1979-08-01), Schroeder et al.
patent: 4300213 (1981-11-01), Tanimura et al.
patent: 4365316 (1982-12-01), Iwahashi et al.
patent: 4616342 (1986-10-01), Miyamoto
patent: 4800303 (1989-01-01), Graham et al.

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