Self-aligned formation and method for semiconductors

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

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438514, 438526, 438586, 438593, 438595, H01L 214763

Patent

active

061658960

ABSTRACT:
A method for forming self-aligned features for semiconductor devices includes the steps of providing a first layer including a reflective material on a surface of the first layer, a second layer formed on the first layer, and a resist layer formed on the second layer, providing radiation through the resist layer and the second layer wherein the radiation is reflected from the reflective material back to the resist layer thereby increasing irradiation of the resist layer over the reflective material and developing the resist layer. A semiconductor device in accordance with the invention includes a first layer with reflective structures therein. A second layer is formed on the first layer, and a patterned resist layer is formed on the second layer. Etched holes are formed in the second layer in accordance with the resist layer pattern, and interconnects are formed in the holes for electrically coupling to the reflective structures wherein the patterned resist layer is rendered by light transmitted through the resist layer and the second layer and reflected from the reflective structures thereby adequately exposing areas directly over the reflective structures, the exposed areas defining the interconnect locations such that the interconnects are aligned with the reflective structures when formed in the holes.

REFERENCES:
patent: 5091326 (1992-02-01), Haskell
patent: 5904529 (1999-05-01), Gardner et al.
patent: 5937302 (1999-08-01), Gardner et al.
patent: 5946585 (1999-08-01), Zhang et al.

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