Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1996-08-23
1998-05-12
Trinh, Michael
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438291, 438307, H01L 21336
Patent
active
057504300
ABSTRACT:
A metal oxide semiconductor field effect transistor includes source and drain regions formed between a gate. The gate comprises a first conductive layer and a second conductive layer formed on the first conductive layer, and the second conductive layer has curved sidewalls with an insulating layer formed adjacent to the sidewalls. The method of making such a transistor improves the fabrication process, since the deposition thickness is controlled rather than the amount of etching. The transistor has a shortened channel width with reduced overlap capacitance, and the LDD doping compensation phenomenon is removed.
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Huang, T., et al., "A Novel Submicron LDD Transistor With Inverse-T Gate Structure," IEDM 86, pp. 742-745.
LG Semicon Co. Ltd.
Trinh Michael
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