Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

1983-07-01

1986-08-05

Popek, Joseph A.

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

365203, 365180, G11C 700

Patent

active

046047280

ABSTRACT:
A semiconductor memory device includes a plurality of static-type memory cells connected to pairs of word lines, each word line pair being composed of a word line having a high potential and a word line having a low potential, and a plurality of word-line discharging circuits, each being connected to one of the word line pairs. Each of the word-line discharging circuits includes, a thyristor whose anode is connected, via a voltage level shifter, to a word line having a high potential and whose cathode is connected to a constant-current source or a constant-voltage source. The thyristor comprises a PNP transistor and an NPN transistor. The NPN transistor can be a multi-emitter transistor or a multi-collector transistor whose second emitter or collector is connected to a word line having a low potential. If the NPN transistor is not a multi-emitter or multi-collector transistor, there is provided another NPN transistor whose base is connected to the base of the above-mentioned NPN transistor, whose collector is connected to the word line having a low potential, and whose emitter is connected to the second constant-current source or the second constant-voltage source.

REFERENCES:
patent: 4156941 (1979-05-01), Homma et al.
patent: 4366558 (1982-12-01), Homma et al.
patent: 4369502 (1983-01-01), Isogai
patent: 4370736 (1983-01-01), Takahashi

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