Semiconductor memory device capable of easily controlling a refe

Details Semiconductor memory device capable of easily controlling a refe Semiconductor memory device capable of easily controlling a refe

1999-09-15

2000-12-05

Dinh, Son T.

Static information storage and retrieval

Read/write circuit

Including reference or bias voltage generator

36518511, 3651852, 365210, G11C 700

Patent

active

061575801

ABSTRACT:
A semiconductor memory device comprises matrix memory cell banks, a reference cell bank device, and a sense circuit. The matrix memory cell banks and the reference cell bank device have deputy bit lines which are implemented by embedded diffused layers, respectively. Each of the matrix memory cell banks comprises a first set of memory cells. The first set of memory cells are for holding data. The reference cell bank device comprises a predetermined number of reference cell banks which are directly connected. Each of the reference cell banks comprises a second set of reference cells. The reference cells are for holding reference voltages. The sense circuit receives data voltages which are read out from the matrix memory cell banks and the reference voltages from the reference cell bank device to determine levels of the data voltages by comparing the data voltages with the reference voltages.

REFERENCES:
patent: 5517448 (1996-05-01), Liu
patent: 5729492 (1998-03-01), Campardo
patent: 5793690 (1998-08-01), Iwahashi
patent: 5966330 (1999-10-01), Tang et al.

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